The present disclosure relates to electronic memory technology, and more specifically, though not exclusively, to a high gain sense amplifier with offset cancellation for magnetoresistive random access memory (MRAM).
MRAM is an emerging memory technology, offering non-volatility, high performance and high endurance. In one example, an MRAM cell includes two magnetic elements separated by a thin insulating layer. The polarity of one of the magnets is fixed, while the other can be changed. When the magnets are parallel the memory element has a lower resistance then the anti-parallel case. This difference in resistance can be read as memory bit in either a “0” or “1” state. The difference in resistance between states can vary depending on implementation and other factors, but may be equal to 2, i.e., a 100 percent change in resistance between the parallel and anti-parallel states.
In one form, MRAM uses spin-transfer torque (STT) techniques. A typical STT MRAM memory cell includes a magnetic tunnel junction in series with a field effect transistor (FET), which is gated by a word line. A bit line and a source line run parallel to each other and perpendicular to the word line. The bit line is connected to the magnetic tunnel junction, and the source line is connected to the FET. One memory cell along the bit line is selected by turning on its word line. When a relatively large voltage (e.g., 500 mV) is forced across the cell from bit line to source line, the selected cell's magnetic tunnel junction is written into a particular state, which is determined by the polarity of this voltage (bit line high vs. source line high).
When the cell is in a logic zero (0) or parallel state, its magnetic tunnel junction resistance is lower than when the cell is in a logic one (1) or anti-parallel state. Typical magnetic tunnel junction resistance values could include R0=5 KΩ and R1=10 KΩ A selected cell is read by sensing the resistance from bit line to source line. The “sense” or “read” voltage is much lower than the write voltage in order to clearly distinguish write and read operations, and to avoid inadvertently disturbing the cell during a read operation. Thus, sensing methodologies are capable of accurately sensing very low read voltage (e.g., less than 50 mV). The combination of a small difference in resistance and sensing the difference at a low voltage makes the design of a MRAM read system very challenging.